Abstract
Abstract: Contemporary times holds a substantial hurdle in the designing of chips and ICs due to the
roadblocks in the nanotech scaling of transistors, which is an obvious reason for Moore's Law to be working at a
slower pace. The CMOS, VLSI technology imposes serious challenges when it enters the nano-domain, leading
to the need of an innovation in nanotech scale. Quantum Dot Cellular Automata (QDCA or QCA) is a novel
emerging transistor-less revolution for computation in the nanotech order. Besides this, irreversibility is a major
concern in digital computation due to the loss of information. Therefore, here a reversible methodology is
followed to address the problem of power dissipation. The purpose of this paper is to present a novel reversible
full adder (RFA) of complexity 123 cells, 1.5 delay and area of 0.11um2 is introduced using single layer cross
over coplanar scheme, employing the demonstrated adder universal basic gates are implemented. On the basis of
this adder we construct a 3-bit Comparator with a delay of 4.25 factors and cell count of 581.
Details
| Primary Language | English |
|---|---|
| Subjects | Engineering |
| Journal Section | Articles |
| Authors | |
| Publication Date | December 31, 2022 |
| Published in Issue | Year 2022Volume: 21 |
